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 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T OCTAL D FLIP-FLOP with CLOCK ENABLE
PI74FCT377T
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Product Features:
* The PI74FCT377T is pin compatible with bipolar FASTTM Series at a higher speed and lower power consumption * TTL input and output levels * Octal D flip-flops with Clock Enable * Extremely low static power * Hysteresis on all inputs * Industrial operating temperature range: -40C to +85C * Packages available: - 20-pin 173 mil wide plastic TSSOP (L) - 20-pin 300 mil wide plastic DIP (P) - 20-pin 150 mil wide plastic QSOP (Q) - 20-pin 150 mil wide plastic TQSOP (R) - 20-pin 300 mil wide plastic SOIC (S)
Fast CMOS Octal D Flip-Flop with Clock Enable
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.6/0.8 micron CMOS technology, achieving industry leading speed grades. The PI74FCT377T is an 8-bit wide octal designed with eight edgetriggered D-type flip-flops with individual D inputs and O outputs. When Clock Enable (CE) is LOW, the common buffered Clock (CP) loads all flip-flops simultaneously. The register is fully edgetriggered. D input state, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's O output. The CE input must be stable only one setup time prior to the LOW-to-HIGH transition for predictable operation.
Logic Block Diagram
D0 CE D1 D2 D3 D4 D5 D6 D7
D CP CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
O0
O1
O2
O3
O4
O5
O6
O7
Product Pin Configuration
CE O0 D0 D1 O1 O2 D2 D3 O3 GND
1 20 2 19 3 20-PIN 18 L20 17 4 P20 16 5 Q20 6 15 R20 7 14 S20 8 13 9 12 10 11
Product Pin Description
Pin Name CE CP D0-D7 O0-O7 GND VCC
Truth Table(1)
Vcc O7 D7 D6 O6 O5 D5 D4 O4 CP
Inputs Outputs Description Mode CP CE DN ON Clock Enable (Active LOW) Load "1" l h H Clock Pulse Input Load "0" l l L Data Inputs Hold h X NC Data Outputs (Do Nothing) H H X NC Ground Power 1. H = HIGH Voltage Level h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition L = LOW Voltage Level l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition X = Don't Care NC = No Change = LOW-to-HIGH Clock Transition
1
PS2017A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T OCTAL D FLIP-FLOP with CLOCK ENABLE
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................................................... -65C to +150C Ambient Temperature with Power Applied .....................................-40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ........... -0.5V to +7.0V DC Input Voltage ............................................................................ -0.5V to +7.0V DC Output Current ..................................................................................... 120 mA Power Dissipation ..........................................................................................0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5V 5%)
Parameters Description VOH VOL VIH VIL IIH IIL VIK IOS IOFF VH Output HIGH Voltage Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current Clamp Diode Voltage Short Circuit Current Power Down Disable Input Hysteresis Test Conditions(1) VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Min., IIN = -18 mA VCC = Max.(3), VOUT = GND VCC = GND, VOUT = 4.5V -60 -- VIN = VCC VIN = GND -0.7 -120 -- 200 100 IOH = -15.0 mA IOL = 64 mA 2.0 0.8 1 -1 -1.2 Min. 2.4 Typ(2) 3.0 0.3 0.55 Max. Units V V V V A A V mA A mV
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
2
PS2017A 03/11/96
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT377T OCTAL D FLIP-FLOP with CLOCK ENABLE
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per Input @ TTL HIGH Supply Current per Input per MHz(4) VCC = Max. VCC = Max. VCC = Max., Outputs Open CE = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle CE = GND 50% Duty Cycle One Bit toggling at fI = 5 MHZ VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle CE = GND Eight Bits toggling at fI = 2.5 MHZ 50% Duty Cycle Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) VIN = VCC VIN = GND Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.0 0.25 Units A mA mA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
1.57 2.0 3.8 6.0
3.5(5) 5.5(5) 7.3(5) 16.3(5)
mA
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI (All currents are in milliamps and all frequencies are in megahertz.)
Switching Characteristics over Operating Range
377T Com.
(1)
377AT Com. Max Min Max
377CT Com. Min Max
377DT Com. Min Max Unit
Parameters tPLH tPHL tSU tH tSU tH tW
Description Propagation Delay CP to ON Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP Setup Time HIGH or LOW CE to CP Hold Time HIGH or LOW CE to CP Clock Pulse Width(3) HIGH or LOW
Conditions
Min
CL = 50 pF RL = 500
2.0 2.5 2.0 4.0 1.5 7.0
13.0 -- -- -- -- --
2.0 2.0 1.5 3.5 1.5 6.0
7.2 -- -- -- -- --
2.0 2.0 1.5 3.5 1.5 6.0
5.2 -- -- -- -- --
2.0 2.0 1.5 2.0 1.5 3.0
4.5 -- -- -- -- --
ns ns ns ns ns ns
Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter guaranteed but not production tested.
3
PS2017A 03/11/96


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